| Título: | Profiling on Superscalar Pipelining Architecture and Multi-Pipeline Scheduling Policies |
| Autores: |
Bhalla, Tarun; Assistant Professor,
Anand College of Engineering & Management, Kapurthala,
India Mittal, Mohit; Assistant Professor, Anand College of Engineering & Management, Kapurthala, India |
| Fecha: | 2012-10-29 |
| Publicador: | International journal of computer and electronics research |
| Fuente: |
 |
| Tipo: | Peer-reviewed Article |
| Tema: |
superscalar pipeline design;pipeline stalling; multipipeline scheduling i.e. in-order issue & in-order completion; in-order issue & out-order completion and out-order issue & out-order completion Computer science |
| Descripción: | In this paper, we present the process of pipelining using superscalar processor. A super-scalar processor is one that is capable of sustaining an instruction-execution rate of more than one instruction per clock cycle. Maintaining this execution rate is primarily a problem of scheduling processor resources (such as functional units) for high utilization. Multiple pipes are used for improving the performance of pipelining. A superscalar processor can be envisioned having multiple parallel pipelines, each of which is processing instructions simultaneously from a single instruction thread. |
| Idioma: | Inglés |
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